The present invention relates to a method of manufacturing semiconductor devices, and particularly to a method of manufacturing PIN photodiodes or other photodiodes.
Among semiconductor devices, photodiodes are diodes that generate a current upon receiving light, being used widely as light receiving devices for optical pickup devices built into CD, DVD or other optical disk drives.
Photodiodes have a structure consisting of a semiconductor with a pn junction, and by applying a reverse bias to the pn junction, the depletion layer is widened to induce a high electric field. Light absorbed mainly by the depletion layer generates electron-hole pairs, and drawn by the electric field, the electrons move toward the n-type semiconductor region and the holes move toward the p-type semiconductor region, being detected as current.
The types of said photodiodes include PIN photodiodes wherein an I layer (a pxe2x88x92 layer or nxe2x88x92 layer) containing a low density of conductive impurities is provided between the p layer and n layer, thus making the depletion layer more easily widened at low voltage, and avalanche photodiodes wherein a region for generating an avalanche breakdowvn is provided.
FIG. 13(a) is a cross-sectional diagram of said PlN photodiode.
For example, an nxe2x88x92 semiconductor layer 11 is formed upon a silicon semiconductor substrate 10, and in the region to become the PIN diode (for example, a 100 xcexcmxc3x97100 xcexcm region), a pxe2x88x92 semiconductor layer 12 is formed upon the surface layer region of the n31  semiconductor layer 11, thereby forming a pn junction.
Upon the top layer of the p+ semiconductor layer 12 is laminated an insulating film I consisting of a first insulating film 20, second insulating film 21, third insulating film 22, fourth insulating film 23 and fifth insulating film 24. The first through fifth insulating films (20-24) may each consist of silicon oxide films formed by means of the chemical vapor deposition (CVD) method using tetraethylorthosilicate (TEOS) as the raw material, BPSG (boro-phosphosilicate glass; silicon oxide containing phosphorus and boron) films, silicon nitride films or the like.
The aforementioned insulating film I attenuates the light incident on the p+ semiconductor layer 12, so a hole that exposes the p+ semiconductor layer 12 is formed in the insulating film I.
When a reverse bias is applied to the aforementioned PIN photodiode, as shown in FIG. 13(b), the depletion layer V is enlarged from the pn junction surface toward the nxe2x88x92 semiconductor layer 11 and pxe2x88x92 semiconductor layer 12 sides.
Here, the depletion layer is enlarged so that the total number of carriers on the n side and p side become equal, so the nxe2x88x92 semiconductor layer 11 side which has a lower carrier density is enlarged to a greater degree.
When light L is incident upon the aforementioned depletion layer, the light L is absorbed by the depletion layer, generating a electron-hole pair (indicated by the o symbol in FIG. 13(b)) which is detected as current. When light L is absorbed by portions not in the depletion layer, an electron-hole pair is not generated (indicated by the xc3x97 symbol in FIG. 13(b)).
Here follows a description of the method of manufacturing the aforementioned PIN photodiode.
First, as shown in FIG. 14(a), a silicon semiconductor substrate 10 is subjected to ion implantation with phosphorus or other n-type impurities to form an nxe2x88x92 semiconductor layer 11.
Next, in the PIN diode formation region (for example, a 100 xcexcmxc3x97100 xcexcm region), ion implantation with boron or other p-type impurities is performed using a resist mask (not shown) to form a p+ semiconductor layer 12 upon the surface layer region of the nxe2x88x92 semiconductor layer 11. Note that the nxe2x88x92 semiconductor layer 11 may also be formed by epitaxial growth.
Next, as shown in FIG. 14(b), upon the entire surface of the top layer of the p+ semiconductor layer 12 is laminated an insulating film I consisting of a first insulating film 20, second insulating film 21, third insulating film 22, fourth insulating film 23 and fifth insulating film 24.
Here, the first through fifth insulating films (20-24) may be formed by depositing silicon oxide films formed by means of the CVD method using TEOS as the raw material, depositing BPSG films, or they may be laminated by a step of depositing silicon nitride films by the CVD method or the like.
Aluminum or other wiring is normally formed in regions not shown in the figure between the aforementioned first through fifth insulating films (20-24), and in this case, the first through fifth insulating films (20-24) are formed such that they reduce the differences in level arising due to the aforementioned wiring and the like.
In the state shown in FIG. 14(b), the insulating film I is formed upon the top layer of the depletion layer region which extends from the interface between the p+ semiconductor layer 12 and nxe2x88x92 semiconductor layer 11 which is the light-sensitive region, and this insulating film I attenuates the light incident on the p+ semiconductor layer 12, so a hole that exposes the p+ semiconductor layer 12 is normally formed in the insulating film 1.
The aforementioned hole is formed by RIE (reactive ion etching) or another type of dry etching or wet etching after the formation of a resist film with the aforementioned hole pattern.
However, in the aforementioned conventional process of manufacturing PIN photodiodes, at the time of forming the hole that exposes the p+ semiconductor layer in the insulating film, peeling of the laminated insulating films may occur, or leakage may occur at the pn junction of the diode, and other problems may also occur.
FIG. 15 is a cross-sectional diagram showing the state at the time of formation of the hole H in the aforementioned insulating film I that exposes the p+ semiconductor layer 12, after the resist film R with the hole pattern is formed, and after the dry etching is performed.
In the aforementioned method, since overetching still occurs after the first insulating film corresponding to the bottom of the hole is removed by etching, the surface of the p+ semiconductor layer 12 is hit directly by etching gas and suffers damage D, becoming the cause of occurrence of leakage.
FIG. 16 is a cross-sectional diagram showing the state at the time of formation of the hole H in the aforementioned insulating film I that exposes the p+ semiconductor layer 12, after the resist film R with the hole pattern is formed, and after the wet etching is performed.
In the aforementioned method, in contrast to dry etching, the surface of the p+ semiconductor layer 12 is not hit directly by etching gas and does not suffer damage, but the etching rates of the first through fifth insulating films (20-24) which make up the insulating film I are different depending on the composition or film quality or the like, so films with high etching rates X are gouged out from the inside wall surface of the hole, and peeling of the film due thereto may occur.
The present invention came about in light of the aforementioned problem and thus the object of the present invention is to provide a method of manufacturing PIN diodes or other diodes, said method being a method of manufacturing semiconductor devices whereby an insulating film as the upper layer of the diode can be removed without causing film peeling or leakage.
In order to achieve the aforementioned object, the method of manufacturing photodiodes according to the present invention comprises: a step of forming a second semiconductor layer of a second conduction type upon the primary surface of a first semiconductor layer of a first conduction type, a step of forming a mask layer upon said second semiconductor layer, a first etching step of etching said first insulating layer by using said mask layer as a stopper, thus forming a hole above said mask layer, and a second etching step of removing said mask layer by etching via said hole.
The method of manufacturing photodiodes according to the present invention preferably further comprises a step of forming a second insulating layer upon said second semiconductor layer, thus forming said mask layer upon said second insulating layer.
In addition, the method of manufacturing photodiodes according to the present invention is preferably such that said first insulating layer comprises a silicon oxide film or silicon nitride film, and said mask layer is a metal film.
The method of manufacturing photodiodes according to the present invention is preferably such that said first etching is dry etching and said second etching is wet etching.
The method of manufacturing photodiodes according to the present invention is preferably such that said second semiconductor layer is formed in a banded pattern comprising mutually separated first semiconductor regions and second semiconductor regions, or such that said second semiconductor layer is formed in a checkerboard pattern.
In the aforementioned method of manufacturing photodiodes according to the present invention, a photodiode is formed by forming, upon the surface layer (primary surface) of a first semiconductor layer of a first conduction type, a second semiconductor layer of a second conduction type that has portions partitioned by means of the first semiconductor layer on a single cross section, for example.
Next, a mask layer which has a different etching selectivity with respect to the semiconductor layer is formed upon the top layer of the semiconductor layer of a second conduction type.
Next, a first insulating layer, comprising silicon oxide films or silicon nitride films or the like for example, which has a different etching selectivity with respect to the mask layer is formed upon the top layer of the mask layer.
Next, a hole with its bottom surface consisting solely of the top surface of the mask layer is formed in the first insulating layer by dry etching or the like using the mask layer as an etching stopper.
Next, wet etching or the like is used to selectively remove the mask layer in exposed areas within the interior of the hole.
By means of the aforementioned method of manufacturing photodiodes according to the present invention, when the insulating film which is the layer atop the diode is removed, the mask layer is used as the etching stopper, so in order to prevent the occurrence of gouging from the wall surface in the interior of the hole which causes film peeling, even when dry etching or other etching techniques are used, the substrate at this stage (the second semiconductor layer) (or the second semiconductor layer formed between the substrate and the mask layer) is protected by a mask layer, so it does not suffer damage which causes leakage.
In addition, when the mask layer exposed in the interior of the hole is removed, in order to prevent damage to the substrate (the second semiconductor layer), even if wet etching or other etching techniques are used, it is possible to selectively remove the mask layer without the occurrence of gouging from the wall surface in the interior of the hole in the first insulating film.
Therefore, in the method of manufacturing diodes, it is possible to remove the insulating film which is the layer atop the diode without the occurrence of film peeling or leakage.
In addition, the second semiconductor layer is formed such that it has portions partitioned by means of the first semiconductor layer on at least a single cross section, so when stipulated voltages are applied to the first semiconductor layer and second semiconductor layer, respectively, the depletion layer extends from each junction surface toward the first semiconductor layer between said second semiconductor layers, and the portions of the semiconductor layer in the portions that partition the second semiconductor layer can be made a depletion layer contributing to photoelectric conversion, thus increasing the sensitivity of the photodiode and improving its characteristics.